Bataev, Alexey: LLVM Compiler for RISC-V Architecture

This book offers a comprehensive introduction to the RISC-V RVV extension and its integration with LLVM-based compilers. It covers the LLVM VPlan-based Loop Vectorizer and SLP Vectorizer, along with additional insights into the clang frontend, OpenMP support, and RVV-specific clang directives provided by SiFive. Given the limited information currently available on RVV and its support in modern compilers, this book fills a crucial gap. RVV introduces a unique approach to vectorization-Vector Length Agnostic (VLA) vectorization-which stands out from the fixed vectors of x86 and the runtime-defined, yet fixed, ARM-based SVE and SVE2 extensions. Readers will gain an understanding of RVV-specific VLA-based vectorization support in LLVM-based compilers, which are still under development. The book also provides early insights into the ongoing support for RVV in LLVM. What You‘ll Learn Gain foundational knowledge of RISC-V and the RVV extension. Learn and implementation of LLVM vectorizers. Learn to optimize performance with RVV-specific clang directives. Explore the unique Vector Length Agnostic (VLA) vectorization. Discover the differences between RVV and other vector extensions. Who This Book Is For 1. For the engineers, who would like to get more info about RISC-V in general and RISC-V Vectorextension particularly. 2. For the developers, trying to get the performance using RVV. 3. For LLVM compiler developers, trying or learn more about vectorization support in LLVM.4. 4. For the students, who learn new about RISC- V, its extensions, interested in compiler development.